FPGA大型输入数据[英] FPGA large input data

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问题描述

我试图向FPGA发送4千键字符串,这是最简单的方法是什么?

是链接对于我正在使用的FPGA.我正在使用Verilog和Quartus.

推荐答案

您问题的答案在很大程度上取决于将这些数据馈送到FPGA中的原因.即使没有特定协议,您也需要遵守(SPI,以太网,USB等),也存在一个问题,即您需要多快地接受数据以及数据必须传递多远.如果非常慢,您可以使用带有并行数据总线和时钟的常规IO引脚创建一个简单的接口.如果要快得多,您可能需要使用高速串行接口和芯片上可用的特殊硬逻辑来探索以处理这些速度.即使较慢,但是数据需要在一定距离内传播,串行接口也可能是最小化电缆成本的好主意.

我会添加到@gbuzogany的答案中:您可能想将FPGA中的内存块配置为FIFO,因此您可以处理与FPGA的内部时钟不同的数据输入时钟.

其他推荐答案

您可以使用FPGA块在FPGA芯片内创建内存(可以从Quartus做到这一点).创建助手允许您使用所需的任何内容(例如:一个4KB字符串)初始化此内存.问题是FPGA内存使用了许多FPGA块,但是对于这样的板来说,它一定不是问题.

这是一个视频,解释了如何在Quartus上执行此操作:

https://www.youtube.com/watch?v=1nhtdopy5gu /p>

其他推荐答案

您可以使用字符串进行内存初始化.在"初始开始端"块中的Verilog中很容易.

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问题描述

I am trying to send a 4 kilobyte string to an FPGA, what is the easiest way that this can be done?

This is the link for the fpga that I am using. I am using Verilog and Quartus.

推荐答案

The answer to your question depends a lot on what is feeding this data into the FPGA. Even if there isn't a specific protocol you need to adhere to (SPI, Ethernet, USB, etc.), there is the question of how fast you need to accept the data, and how far the data has to travel. If it's very slow, you can create a simple interface using regular IO pins with a parallel data bus and a clock. If it's much faster, you may need to explore using high speed serial interfaces and the special hard logic available on your chip to handle those speeds. Even if it's slower, but the data needs to travel over some distance, a serial interface may be a good idea to minimize cable costs.

One thing I would add to @gbuzogany 's answer: You probably want to configure that block of memory in the FPGA as a FIFO so you can handle the data input clock running at a different rate than the internal clock of your FPGA.

其他推荐答案

You can use your FPGA blocks to create a memory inside the FPGA chip (you can do that from Quartus). The creation assistant allows you to initialise this memory with anything you want (e.g: a 4KB string). The problem is that in-FPGA memory uses many of your FPGA blocks, but for a board like this it must not be a problem.

Here is a video explaining how to do that on Quartus:

https://www.youtube.com/watch?v=1nhTDOpY5gU

其他推荐答案

You can use string for memory initialization. It's easy in Verilog in 'initial begin end' block.